Synopsys Inc Off-Campus Recruitment 2021 |Intern (Technical-Engineering)| BE/B.Tech| Freshers
About the Company
The Intern(Technical) is responsible for a wide variety of verification tasks, including designing self-checking test benches using modern verification techniques; designing verification components such as bus functional models, monitors, and behavioral models; implementing functional coverage and assertions using System Verilog/C++; and developing test and functional coverage plans based on device specifications.
| Company Name | Synopsys Inc |
| Company Website | https://sjobs.brassring.com/ |
| Job Location | Noida, Uttar Pradesh, India |
| Degree | BE/B.Tech |
| Experience | 0-0 Yrs |
Job Description and Requirements
The Intern(Technical) is responsible for a wide variety of verification tasks, including designing self-checking test benches using modern verification techniques; designing verification components such as bus functional models, monitors, and behavioral models; implementing functional coverage and assertions using System Verilog/C++; and developing test and functional coverage plans based on device specifications. This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing functional coverage results.
- Strong Verilog coding skills
- Strong debugging skills
- Strong C/C++ or Perl or python scripting skills
- Knowledge on FPGA Architectures
- Highly skilled with one or more industry standard simulation tools Synopsys VCS, Verdi
- Strong understanding of typical design structures (FIFO’s, pipelines, memories, state machines, etc.)
- Fast leaner, comfortable and confident interacting with architects
- Excellent written and verbal communication skills
Apply Link :Click Here
Facebook PageClick Here